Overview
As integrated circuits and electronic systems continue to grow in complexity—driven by emerging applications such as artificial intelligence, the Internet of Things, cloud computing, and automotive electronics—test technologies face increasing pressure to ensure quality, reliability, and scalability. In response to these growing challenges, global collaboration and knowledge sharing are becoming essential.
The 34th Asian Test Symposium (ATS) and the 9th International Test Conference in Asia (ITC-Asia) will be held in conjunction with SEMICON Japan 2025 in Tokyo, Japan. This joint event provides a valuable platform for academic researchers and industry professionals worldwide to present their latest results and exchange ideas in system, board, and device testing, as well as broader test technologies.
News
- Advance program has been added.
- Tutorial information has been added.
- New deadline for AI workshop: Nov. 1, 2025.
- New deadline for ETT workshop: Oct. 14, 2025.
- Registration information has been added.
- VISA information has been added.
Key Dates
- Paper submission deadline:
July 22August 512 , 2025 - Notification of acceptance:
September 2September 24 , 2025 - Camera-ready manuscript:
October 2October 24 , 2025
Upcoming Event Highlights
Keynote 1 (Wednesday, Dec. 17)
Title: New Design for Test Technologies for the Angstrom Era Multi-Die Designs
Speaker: Janusz Rajski (Siemens EDA)
Keynote 2 (Thursday, Dec. 18)
Title: Software-Based Self-Test
with Formal Methods for RISC-V Ecosystems
Speaker: Bernd Becker (University of Freiburg)
Invited Talk 1 (Wednesday, Dec. 17)
Title: 3DIC and advanced packaging technologies for enabling the evolution of AI
Speaker: Ryutaro Yasuhara (TSMC Japan 3DIC R&D Center)
Invited Talk 2 (Thursday, Dec. 18)
Title: Next-Generation SoC Design “Chiplet 2.5D/3D Technology” and Beyond
Speaker: Kazuyuki Irie (TSMC Group, GUC Japan)
