Keynote 1

Title: New Design for Test Technologies for the Angstrom Era Multi-Die Designs

Speaker: Janusz Rajski (Vice President of Engineering, Tessent, Siemens EDA)

Abstract

AI/ML computing, hyperscale data centers, networking, mobile, and automotive are pushing adoption of new technology nodes to satisfy growing demand for computing power. The combined effect of heterogeneous integration and the sub-20 Angstrom process results in design complexities presenting fundamental reliability challenges. The reliable operation of these complex systems throughout the entire long lifecycle is the greatest challenge facing the semiconductor industry today.

In this keynote, we will ask some of the most fundamental questions: How can we further improve the effectiveness of manufacturing screening and reduce test escapes, especially the silent data corruption errors reported by many companies? Can high-voltage stress test replace burn-in to reduce early life failures? Can a deterministic structural test, applied periodically during in-system operation, achieve the required high reliability? How can preventive maintenance use environmental monitoring to detect load conditions or silicon aging and prevent the system malfunction? What new DFT architectures are needed to handle designs with hundreds of cores, facilitate bring up and debug? How can these problems be solved with cost/time constraints? The DFT/SLM flow has become complex; how and where can AI/ML help with productivity and quality of results?

About the Speaker

During his tenure at Mentor Graphics and Siemens, Janusz has built a strong R&D organization with a focus on innovative DFT and SLM technologies. The team has developed several revolutionary products: TestKompress, Cell-Aware Test, and Streaming Scan Network. He has published more than 280 IEEE research papers and is a co-inventor of 130 US and international patents. A Lifetime Fellow of the IEEE, he holds a Ph.D. degree in electrical engineering as well as an honorary doctorate from the Poznań University of Technology. In 2003, he was awarded the prestigious title of “Professor of Science” by the President of Poland. In 2009 he received the Stephen Swerling Innovation Award from Mentor Graphics “for his breakthrough innovation, TestKompress, and his many contributions to revitalizing Mentor’s DFT business to its current position as the #1 test business in EDA”. In 2018, Janusz received the Siemens Inventor of the Year Lifetime Achievement Award “in recognition of his outstanding achievements which have led to valuable inventions in the field of DFT of integrated circuits”. In 2022 he received the Siemens Inventor of the Year Award for co-inventing the Streaming Scan Network.