Tutorial 1
Topic: Designing Chiplets & 3DIC for Silicon Lifecycle Management
Lecturer: Yervant Zorian (Chief Architect and fellow, Synopsys, Inc.)
Abstract
Recent advances in Artificial Intelligence accelerators, automotive systems, and high-performance computing (HPC) in data centers have led to an acceleration in the adoption of advanced chiplets and 3DIC packaging technologies. This tutorial will present today’s trends in high-end electronic systems and their needs for advanced chiplets and 3DIC systems and concentrate on the resiliency challenges and solutions for such chiplets and 3DIC systems. It will mainly focus on optimizing the chiplet silicon health, using advanced solutions for managing different silicon lifecycle stages: starting from chiplet design, to silicon debug in early bring up; to self-test and repair during volume production for improving quality and yield at single die and multi die levels; to in field power-on self-test to address aging and degradation challenges; to in-system periodic checking to improve reliability, functional safety (FuSa) and Security; and finally to fault tolerance during mission mode to address in field errors.
About the Lecturer
Dr. Yervant Zorian is the President of Synopsys Armenia, Chief Architect and Fellow at Synopsys. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia.
He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, the General Chair of the 50th Design Automation Conference (DAC) and the 50th International Test Conference (ITC) as well as several other symposia and workshops.
Dr. Zorian holds more than 40 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia’s National Medal of Science. In 2022 Dr. Zorian received IEEE TTTC Lifetime Contribution Award.
Member of the Central Board of the Armenian General Benevolent Union (AGBU) Dr. Yervand Zorian is the Founding President of the Armenian Virtual College (AVC), the President of the AGBU Silicon Valley Branch, and the Chairman of the ArmTech Congress Program Committee. He is a foreign member of the National Academy of Sciences of the Republic of Armenia, as well as a member of the Board of Trustees of the American University of Armenia. Adhering to the Zorians’ family traditions and values, he continuously works on programs aimed at preservation of the Armenian identity. He is a member of initiative groups or the author of a number of new programs of pan-Armenian significance, including HyeConnect, Armenian Virtual Bridge, AVC Learning Zone, etc.
He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.
Tutorial 2
Topic: Enhancing Trustworthiness in the Global IC Supply Chain
Lecturer: Giorgio Di Natale (Director of Research (CNRS) – TIMA Director, Université Grenoble-Alpes)
Abstract
In the current global landscape of Integrated Circuits (ICs) supply chain, which now includes the emerging 3D and chiplet-based circuits, the importance of security and reliability in manufactured circuits cannot be overstated. This tutorial is designed to offer a thorough comprehension of these issues and investigate possible strategies to address them in both traditional 2D and emerging 3D/chiplet-based ICs.
The tutorial will kick off with a broad look at the present condition of the global ICs supply chain, pointing out the main weaknesses that could be taken advantage of by ill-intentioned parties. We will thoroughly examine various types of IC piracy, such as hardware Trojans, counterfeiting, and reverse engineering, and consider their potential consequences for the industry.
As we progress in the tutorial, we will concentrate on hardware authentication and metering techniques. These approaches play a vital role in verifying the genuineness of ICs and curbing overproduction. We will go over the existing studies on hardware authentication, covering Physical Unclonable Functions (PUFs), and IC metering methods like logic locking.
Wrapping up the tutorial, we will engage in a conversation about the forthcoming research directions in IC security, shedding light on the prospective obstacles and prospects in this domain. Attendees will acquire a well-rounded understanding of the risks and potential remedies in the global ICs supply chain, empowering them to make valuable contributions to this essential research area.
About the Lecturer
Giorgio Di Natale received the PhD in Computer Engineering from the Politecnico di Torino in 2003. He is director of research for the National Research Center of France at the TIMA laboratory in Grenoble.
His research interests include hardware security and trust, secure circuits design and test, reliability evaluation and fault tolerance, software implemented hardware fault tolerance, and VLSI testing.